The Problem Digital is an educational digital‑logic designer and circuit simulator that lets students model combinatorial and sequential circuits, visualise signal states, and export hardware descriptions. The code base, however, accumulates deep nesting, duplicated logic, and oversized source files that raise cognitive load for anyone extending or maintaining the simulator.

What This Does The project is written primarily in Java (1085 files) and organised under src/main/java/de/neemann/digital/. It ships a GUI (src/main/java/de/neemann/digital/gui/Main.java) and a CLI entry point (src/main/java/de/neemann/digital/cli/Main.java). Circuit definitions live as .dig files in src/main/dig/, while the simulator core, analysers, and builders reside in the same package tree. Build and dependency management use Maven (pom.xml at the root) and Travis CI runs on every push. The repository contains 887 test files and 6 documentation files, and it carries a licence but no lockfile for dependencies.

How It Is Wired Execution starts in either cli.Main or gui.Main; both classes instantiate a JFrame or process command‑line arguments and delegate to the CircuitBuilder (src/main/java/de/neemann/digital/builder/circuit/CircuitBuilder.java) for netlist construction. The import‑graph analysis of 1090 code files reports zero internal modules, zero import edges, and no circular dependencies, indicating a flat module layout. High‑impact structural findings include:

  • Deep nesting (x56) in ModelAnalyser.java, ATFDialog.java, and CircuitBuilder.java – max indentation depth 8 makes control flow hard to follow.
  • Duplicated code blocks (811 repeated 6‑line fragments across ~301 files), notably in MinimizerQuineMcCluskey.java, MinimizerQuineMcCluskeyExam.java, Constant.java, and Variable.java.
  • Oversized files (≈2038 lines each) Main.java (GUI), CircuitComponent.java, and TestInGUI.java – a single change ripples widely.

The medium‑severity code‑health audit flags src/test/resources/docu/simsun.ttf (10.0 MB) as a large binary that inflates clone size and CI checkout time.

How To Use It

  • Setup: Clone the repository ``bash git clone https://github.com/moses-y/Digital ` or download the pre‑built Digital.zip` from the releases page.
  • Configuration: A Java 8 (JRE 8) runtime is required; no environment variables are needed beyond the JAVA_HOME path.
  • Running it:
  • From source with Maven: mvn compile exec:java -Dexec.mainClass="de.neemann.digital.cli.Main" for the CLI, or -Dexec.mainClass="de.neemann.digital.gui.Main" for the GUI.
  • Using the distribution: unpack Digital.zip and run java -jar Digital.jar (or Digital.sh on Linux).

Real‑World Use A student designs a 4‑bit ripple‑carry adder using the GUI’s 74xx library, runs a test vector to verify timing, and exports the netlist to Verilog via File → Export → Verilog. The resulting file can be fed into an FPGA toolchain or simulated with Icarus Verilog, demonstrating the tool’s end‑to‑end flow from schematic to hardware description.

Code Health & Issues

  • 250 total measured findings: 54 high, 196 medium, 0 low (static analysis).
  • High/cognitive_load – deep nesting x56 in ModelAnalyser.java, ATFDialog.java, CircuitBuilder.java.
  • High/clarity – duplicated code blocks (811 × 6‑line repeats) across ~301 files, e.g. MinimizerQuineMcCluskey.java, Constant.java, Variable.java.
  • High/cognitive_load – oversized files x3 (Main.java, CircuitComponent.java, TestInGUI.java) each ~2038 lines.
  • Medium – large binary src/test/resources/docu/simsun.ttf (10.0 MB) should be tracked with Git LFS or moved outside the repo.

No lockfile for Maven dependencies (non‑reproducible builds) and no Dockerfile are present, but the project includes a licence and runs Travis CI.

The Bottom Line Digital offers a functional, educational circuit simulator with a rich library of 74xx components and export capabilities, making it a solid teaching aid. Maintainability suffers from deep nesting, widespread code duplication, and a few very large source files; addressing those will reduce the barrier for new contributors. It is well‑suited for courses or hobbyists who need a visual, interactive logic simulator, provided the team is willing to refactor the identified hot‑spots.